Millogic - Design Consultants

Millogic offers synthesizable IP of standard devices and buses for use as elements in the design of FPGAs and ASICs. Some of the IP components have a variety of features that can be enabled and configured at synthesis. Features disabled during synthesis are excluded from the target netlist providing an efficient core that can be configured into many different components without gate count overhead. All Millogic cores are shipped in source format and without multi-use licensing fees.

PCI-X Core:

Millogic offers a complete PCI-X core that includes a user-friendly interface, initiator and target functions, Config space, DMA, FIFO's and IO Circuitry as well as the following

  • Industry proven PCI-X megacell
  • 64/32 bit Target
  • 64/32 bit Initiator cycles
  • DMA Engine
  • Transparent Split Transaction Support.
  • Data FIFO's & control for Target write, Target read, Initiator write & initiator read cycles.
  • Easy to use application side interface
  • Configuration space in Target interface
  • Transportable. Our site use license allows you to use the core in your FPGA then migrate the same code to your ASIC.

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HD6303 Core

The Hitachi HD6303 was a popular microcontroller with a number of integrated peripherals. The processor was an extension of the 6801 family. It was integrated with a serial port, timer, programmable IO and interrupt logic.

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ML6802 Core

The Motorola 6802 was a widely used 8 bit microcontroller. The Millogic ML6802 core is functionally equivalent to the 6802, and can easily be implemented in FPGA or other technologies to provide an obsolecence solution.

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ML6821 Core

The Motorola 6821 was a companion device used with the 6800 family microcontrollers. The ML6821 core provides equivalent function for a software compatible solution for legacy products that utilized this peripheral device.

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68901 / 68HC901 Core

The 68901 was a very popular multi-function peripheral chip used with the Motorola 68K family of CPU's. Motorola has discontinued the 901, but now you can get the same functionality and code compatability in a compact synthesizable core.

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ML68230 Core

The 68230 was a parallel interface and timer peripheral chip used with the Motorola 68K family of CPU's. Motorola has discontinued the 230, but now you can get the same functionality and code compatability in a compact synthesizable core.

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ML68681 Core

The 68681 was a Dual UART peripheral chip used with the Motorola 68K family of CPU's. Motorola has discontinued the 681, but now you can get the same functionality and code compatability in a compact synthesizable core.

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ML85C30 Core

The 85C30 was a popular serial communication controller (SCC) supporting asynchronous and synchronous protcols, including HDLC and SDLC. AMD and Zilog have both discontinued the 85C30, but now you can get the same functionality and code compatability in a compact synthesizable core.

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ML85C230 Core

The 85C230 was an extended serial communication controller (SCC) that expanded on the capabilities of the 85C30. The 85C230 contains larger FIFOs than the plain 85C30 to support higher data rates. When the ML85C230 core is implemented in a current technology FPGA, much higher data rates are achievable.

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ML72001 Core

The uPD72001 was an extended serial communication controller (SCC) that marketed as a superset of the industry standard 85C30 SCC. NEC has discontinued the uPD72001, but the ML72001 provides a software compatible solution when implemented in and FPGA or ASIC.

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ML82C51 Core

The 82C51 core is a functional equivalent synthesizable core of the popular Intel 82C51 USART. This core is available in both Verilog and VHDL, and is provided in alternate implementations. The plain ML82C51 core provides a functional replacement for the original parts. The ML82C51S is a synchronous versio of this core, implemented in a single clock domain and a synchronous bus interface. The ML82C51S is optimized to simplify scan insertion for simple integration into ASIC designs.

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Video Encoder Core

The Millogic Video Encoder module takes 4:2:2 video data and produces composite video output. The module generates vertical and horizontal syncs for NTSC interlaced video as well as the color burst. The Chroma samples are modulated and added to the syncs, color burst and luma data. The Encoder assumes that Luma/Chroma samples are already appropriately bandwidth limited. The module generates a data stream at 4 times the video sample rate, and assumes an 8x clock to facilitate sharing of the chroma modulation multiplier. The module can be configured for 8 or 10 bit video data. The following functions are available in the video encoder:2

Side by side images compressed horizontally (Multiplexer)
1st half/2nd half of image expanded to fill screen (DeMultiplex)
Right/Left Split screen
Top/Bottom split screen
Horizontal Flip
Vertical Flip
Horiontal and Vertical Flip (180 Rotate)
Triggered freeze frame
Frame difference (2 sources)
Frame difference current - previous frame (motion detection)
Peak video capture
Minimum video capture
Video time domain filter (removes video noise)
Video Inset (picture-in-picture)
Video magnifier (expands region of video)
Quadrant Expansion (Expand one corner of screen to fill entire screen)
Chroma Key (with Screen color capture)
Circle overlay

Video Scaler (rescale Horizontal and/or Vertical)

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PS2 Mouse Wrapper

This building block allows you to easily add a PS2 mouse interface to your FPGA or ASIC. This block is useful for integrating mouse movement and control into any video application.

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MLVIC64 VME Master Controller

The MLVIC64 VMEbus Master Core emulates the functionality of the now discontinued Cypress VIC64 VME bus master interface chip. All modes and functions of the original part are supported. The VIC64 was an extension of the VIC0068, supporting VME64 operations. It was designed to work with the CY7C964 VME datapath chip. Millogic provides both an IP and an ASIC version of the CY7C964.

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MLVIC068 VME Master Controller

The MLVIC068 VMEbus Master Core emulates the functionality of the now discontinued Cypress VIC068* VME bus master interface chip. All modes and functions of the original part are supported. The VIC068 was designed to work with the CY7C964 VME datapath chip. Millogic provides both an IP and an ASIC version of the CY7C964.

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ML7C960 VME Slave Interface

The ML7C960 & ML7C964 VMEbus Slave CoreSet are now available as ASICs, providing a drop-in component replacement for the original Cypress parts. Contact Millogic sales for pricing and information.

The ML7C960 VMEbus Slave Core Component emulates the functionality of the now discontinued Cypress CY7C960* VME bus interface chip. All modes and functions are supported except for the DRAM controller. Also available is a drop in (pin compatible) replacement daughter card for this part. Using a PQFP adaptor and an FPGA (Xlinx or Actel). You can now replace replace existing parts on legacy boards without re-spinning.

*Cypress and CY7C960 are trademarks of Cypress Semiconductor.

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ML7C961 VME Master Interface

The ML7C961 VMEbus Master Core Component emulates the functionality of the now discontinued Cypress CY7C961* VME bus interface chip.

*Cypress and CY7C961 are trademarks of Cypress Semiconductor.

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ML7C964 VME Address and Data Interface

The ML7C964 VMEbus Slave Core Component emulates the functionality of the now discontinued Cypress CY7C964* VME bus data slice. The core is compatible with either our 960 cor or the original CY7C960 part.

*Cypress and CY7C960 are trademarks of Cypress Semiconductor.

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VMEbus Slave Interface

The VMEbus Slave Core Component supports all addressing modes, and 32-bit and 16-bit data bus widths. Supports address pipelining and provides address decode and register read/write strobes. The core provides control signals for either external data buffers or to control I/O ring FF's. Strobe generation alows use of other IP such as DRAM control.

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I2C Compatible Serial Interface

Millogic provides two models of the popular serial interface. The multi-master Core Component supports I2C arbitration allowing multiple masters on the same two-wire interface. The second version is for single master applications.

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Enhanced I2C Compatible Serial Interface

This module includes the simple I2C interface above but also has additional logic to provide automatic configuration of I2C devices attached to it. Values are read from a ROM built in the FPGA and configuration address and data are transmitted across the I2C bus. Supports looping. This frees the designer from requiring external processing to configure I2C devices.

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Alaw and ulaw Digital Audio Encoder / Decoder

Millogic offers two separate cores: ulaw/Alaw encoder and the ulaw/Alaw decoder. Both are configurable for ulaw, Alaw, or both. Their compact size makes them well suited for either FPGA and ASIC targets.

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